Senior Hardware Design Engineer (Gate Driver)

Zhuzhou CRRC Times Electric UK Innovation Centre (TEIC) is a subsidiary of the CRRC Corporation Limited, the world’s leading propulsion and control systems provider in the rolling stock industry. Our mission is to design, develop and produce state of the art power electronics systems and components for automotive electric vehicles, rail, and renewable energy sectors.
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Overview of the role:
We are looking for a Senior Hardware Design Engineer to join our railway team at TEIC. This role will be responsible for circuit design, simulation analysis, test verification of the gate driver of power semiconductor devices.
What you will be doing in this role:
• Design and development of gate drive board for power semiconductor devices with rated voltage of 1200V or higher
• Ensure hardware solutions, detailed technical design and PCB design meet technical specifications
• Hardware circuit analysis, including FMEDAs, FTAs, and diagnostic coverage analysis, DFMEA, DRBFM reliability analysis, etc., define technical specifications and complete work reports
• Hardware design simulation calculations, including tolerance, worst case, derating, EMC, thermal simulation, etc., define technical specifications and prepare work reports
• Circuit testing, validation and calibration work, and complete test specifications and reports
• Electronic material management, PCB package library management
• Summary and validation of design experience/criteria
• Collaborative reliability engineers to complete reliability testing and coordinate with system engineers for integration testing
• Work with project managers and manufacturing departments or contractors to ensure timely and cost-effective prototypes are produced at the expected cost
• Responsible for electronic circuit test fixture preparation
We would like you to have:
• Degree in Engineering, Electronics, Physics or other relevant field (or equivalent experience)
• 5 years working experience on power electronics product design; Strong PCB designing skills
• Able to produce schematics of the gate driver board independently, including the design of the power, driving circuit and protection circuit
• Have two-level or three-level inverter design experience. Ideally the bus voltage of the inverter is 600V or higher with 200KW or higher rated power
• Familiar with power electronics semiconductor module applications
• Rich experiences in gate driver board debugging and double-pulse testing
• Experience with high power switching power supply development project
• Good at Altium Designer, Cadence or similar software
• Previous experience in HALT, quantitative ALT life test would be desirable
Benefits
TEIC is a great place to work with opportunities for professional and personal development. Our benefits include:
• 25 days holiday + 8 bank holidays
• Holiday allowance increase with length of service
• Bupa healthcare
• Healthcare vouchers
• Free on-site car parking
• Free lunch Monday to Friday
• Contributory Pension
• Life assurance
• Cycle to work scheme
• Company sick pay
• Professional Membership fees paid e.g. CIPD, IEEE
• Family Friendly policies
• An Independent 24-hour confidential counseling service
To find out more about TEIC visit www.teic.crrczic.cc.